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IxOsCacheMMU.h

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00001 
00048 #ifndef IxOsCacheMMU_H
00049 
00050 #ifndef __doxygen_hide
00051 #define IxOsCacheMMU_H
00052 #endif /* __doxygen_hide */
00053 
00054 #ifdef __doxygen_HIDE
00055 #define IX_OS_CACHE_DOXYGEN
00056 #endif /* __doxygen_HIDE */
00057 
00058 #include "IxTypes.h"
00059 
00060 #ifdef __vxworks
00061 
00062 #include <vxWorks.h>
00063 #include <cacheLib.h>
00064 #include <memLib.h>
00065 
00066 #endif
00067 
00091 #define IX_ACC_CACHE_ENABLED
00092 
00093 
00094 
00115 void *ixOsServCacheDmaAlloc(UINT32 size);
00116 
00132 void ixOsServCacheDmaFree(void *ptr, UINT32 size);
00133 
00157 #define IX_ACC_DRV_DMA_MALLOC(size) ixOsServCacheDmaAlloc(size)
00158 
00176 #define IX_ACC_DRV_DMA_FREE(ptr,size) ixOsServCacheDmaFree((ptr),(size))
00177 
00178 #if (defined(__vxworks)||defined(IX_OS_CACHE_DOXYGEN))
00179 
00200 #define IX_MMU_VIRTUAL_TO_PHYSICAL_TRANSLATION(addr) (addr)
00201 
00224 #define IX_MMU_PHYSICAL_TO_VIRTUAL_TRANSLATION(addr) (addr)
00225 
00234 #define IX_XSCALE_CACHE_LINE_SIZE (32)
00235 
00252 #define IX_ACC_DRAM_PHYS_OFFSET     (0x00000000UL) 
00253 
00254 
00255 #ifdef IX_ACC_CACHE_ENABLED
00256 
00290 #define IX_ACC_DATA_CACHE_INVALIDATE(addr,size) cacheInvalidate(DATA_CACHE, addr, size)
00291 
00326 #define IX_ACC_DATA_CACHE_FLUSH(addr,size) \
00327     do { cacheFlush(DATA_CACHE, addr, size); cachePipeFlush(); } while(0)
00328 
00329 #else /* IX_ACC_CACHE_ENABLED */
00330 
00331 #define IX_ACC_DATA_CACHE_INVALIDATE(addr,size) {}
00332 #define IX_ACC_DATA_CACHE_FLUSH(addr,size) {}
00333 
00334 #endif /* IX_ACC_CACHE_ENABLED */
00335 
00336 #endif /* (defined(__vxworks)||defined(IX_OS_CACHE_DOXYGEN))*/
00337 
00338 #if (defined(__linux)||defined(IX_OS_CACHE_DOXYGEN))
00339 
00340 #ifndef IX_ACC_CACHE_ENABLED
00341 #error "Uncached memory not supported in linux environment"
00342 #endif
00343 
00344 #include <linux/cache.h>
00345 #include <linux/mm.h>
00346 #include <linux/config.h>
00347 #include <asm/pgalloc.h>
00348 
00353 #define IX_MMU_VIRTUAL_TO_PHYSICAL_TRANSLATION(addr) ((addr) ? virt_to_phys((void*)(addr)) : 0)
00354 #define IX_MMU_PHYSICAL_TO_VIRTUAL_TRANSLATION(addr) ((addr) ? phys_to_virt((unsigned int)(addr)) : 0)
00355 #define IX_ACC_DATA_CACHE_INVALIDATE(addr,size) invalidate_dcache_range((__u32)addr, (__u32)addr + size )
00356 #define IX_ACC_DATA_CACHE_FLUSH(addr,size) clean_dcache_range((__u32)addr, (__u32)addr + size )
00357 #define IX_ACC_DRAM_PHYS_OFFSET     (PHYS_OFFSET) 
00358 
00359 #define IX_XSCALE_CACHE_LINE_SIZE 32
00360 
00361 #endif /* (defined(__linux)||defined(IX_OS_CACHE_DOXYGEN))*/
00362 
00363 #ifndef __vxworks
00364 #ifndef __linux
00365 
00366 /* default implementatins of above macros here.
00367  */
00368 
00369 #define IX_MMU_VIRTUAL_TO_PHYSICAL_TRANSLATION(addr) (addr)
00370 #define IX_MMU_PHYSICAL_TO_VIRTUAL_TRANSLATION(addr) (addr)
00371 #define IX_ACC_DATA_CACHE_INVALIDATE(addr,size)
00372 #define IX_ACC_DATA_CACHE_FLUSH(addr,size) 
00373 
00374 #define IX_XSCALE_CACHE_LINE_SIZE 32
00375 
00376 #endif /* __vxworks */
00377 #endif /* __linux */
00378 
00383 #endif /* IxOsCacheMMU_H */
00384 
Automatically generated from sources. © Intel Corp. 2003