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IxAtmdAccUtopiaConfig::UtRxConfig_ Struct ReferenceUtopia Rx config Register.
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Data Fields | |
unsigned int | rxInterface:1 |
[31] Utopia Receive Interface | |
unsigned int | rxMode:1 |
[30] Utopia Receive Mode | |
unsigned int | rxOctet:1 |
[29] Utopia Receive cell transfer protocol | |
unsigned int | rxParity:1 |
[28] Utopia Receive Parity Checking enable | |
unsigned int | rxEvenParity:1 |
[27] Utopia Receive Parity Mode
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unsigned int | rxHEC:1 |
[26] RxHEC Header Error Check Mode | |
unsigned int | rxCOSET:1 |
[25] If enabled the HEC is Exclusive-ORÆed with the value 0x55 before being tested with the received HEC | |
unsigned int | rxHECpass:1 |
[24] Specifies if the incoming cell HEC byte should be transferred after optional processing to the NPE2 Coprocessor Bus Interface or if it should be discarded | |
unsigned int | reserved_1:1 |
[23] These bits are always 0 | |
unsigned int | rxCellSize:7 |
[22:16] Receive cell size | |
unsigned int | rxHashEnbGFC:1 |
[15] Specifies if the VPI field [11:8]/GFC field should be included in the Hash data input or if the bits should be padded with 1Æb0 | |
unsigned int | rxPreHash:1 |
[14] Enable Pre-hash value generation | |
unsigned int | reserved_2:1 |
[13] These bits are always 0 | |
unsigned int | rxAddrRange:5 |
[12:8] In ATM master, MPHY mode, this register specifies the upper limit of the PHY polling logical range | |
unsigned int | reserved_3:3 |
[7-5] These bits are always 0 . | |
unsigned int | rxPHYAddr:5 |
[4:0] When configured as a slave in an MPHY system this register specifies the physical address of the PHY |
Definition at line 1274 of file IxAtmdAccCtrl.h.
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[23] These bits are always 0
Definition at line 1317 of file IxAtmdAccCtrl.h. |
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[13] These bits are always 0
Definition at line 1334 of file IxAtmdAccCtrl.h. |
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[7-5] These bits are always 0 .
Definition at line 1341 of file IxAtmdAccCtrl.h. |
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[12:8] In ATM master, MPHY mode, this register specifies the upper limit of the PHY polling logical range The number of active PHYs are RxAddrRange + 1. Definition at line 1336 of file IxAtmdAccCtrl.h. |
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[22:16] Receive cell size Configures the receive cell size. Values between 52-64 are valid Definition at line 1319 of file IxAtmdAccCtrl.h. |
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[25] If enabled the HEC is Exclusive-ORÆed with the value 0x55 before being tested with the received HEC
Definition at line 1306 of file IxAtmdAccCtrl.h. |
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[27] Utopia Receive Parity Mode
Definition at line 1297 of file IxAtmdAccCtrl.h. |
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[15] Specifies if the VPI field [11:8]/GFC field should be included in the Hash data input or if the bits should be padded with 1Æb0
Definition at line 1322 of file IxAtmdAccCtrl.h. |
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[26] RxHEC Header Error Check Mode Enables/disables cell header error checking on the received cell header.
Definition at line 1301 of file IxAtmdAccCtrl.h. |
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[24] Specifies if the incoming cell HEC byte should be transferred after optional processing to the NPE2 Coprocessor Bus Interface or if it should be discarded
Definition at line 1311 of file IxAtmdAccCtrl.h. |
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[31] Utopia Receive Interface The following encoding is used to set the Utopia Receive interface as ATM master or PHY slave:
Definition at line 1277 of file IxAtmdAccCtrl.h. |
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[30] Utopia Receive Mode The following encoding is used to set the Utopia Receive mode to SPHY or MPHY:
Definition at line 1282 of file IxAtmdAccCtrl.h. |
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[29] Utopia Receive cell transfer protocol Used to set the Utopia cell transfer protocol to Octet-level handshaking. Note this is only applicable in SPHY mode.
Definition at line 1287 of file IxAtmdAccCtrl.h. |
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[28] Utopia Receive Parity Checking enable
Definition at line 1293 of file IxAtmdAccCtrl.h. |
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[4:0] When configured as a slave in an MPHY system this register specifies the physical address of the PHY
Definition at line 1342 of file IxAtmdAccCtrl.h. |
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[14] Enable Pre-hash value generation Specifies if the incoming cell data should be pre-hashed to allow VPI/VCI header look-up in a hash table.
Definition at line 1328 of file IxAtmdAccCtrl.h. |