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IxEthDBPortDefs.h

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00001 
00054 #ifndef IxEthDBPortDefs_H
00055 #define IxEthDBPortDefs_H
00056 
00060 typedef enum
00061 {
00062     ETH_GENERIC = 0, 
00063     ETH_NPE          
00064 } IxEthDBPortType;
00065 
00072 typedef enum
00073 {
00074     NO_CAPABILITIES   = 0,   
00075     ENTRY_AGING       = 0x1  
00076 } IxEthDBPortCapability;
00077 
00081 typedef struct
00082 {
00083     IxEthDBPortType type;
00084     IxEthDBPortCapability capabilities;
00085 } IxEthDBPortDefinition;
00086 
00094 static IxEthDBPortDefinition ixEthDBPortDefinitions[] = 
00095 {
00096     /*    id       type           capabilities */
00097     {   /* 0 */    ETH_NPE,       ENTRY_AGING },    /* Ethernet NPE B */
00098     {   /* 1 */    ETH_NPE,       ENTRY_AGING },    /* Ethernet NPE C */
00099     {   /* 2 */    ETH_GENERIC,   NO_CAPABILITIES } /* WAN port */
00100 };
00101 
00107 #define IX_ETH_DB_NUMBER_OF_PORTS (sizeof (ixEthDBPortDefinitions) / sizeof (ixEthDBPortDefinitions[0]))
00108 
00114 #define IX_ETH_DB_PORTS_ASSERTION { switch(0) { case 0 : ; case 1 : ; case IX_ETH_DB_NUMBER_OF_PORTS : ; }}
00115 
00122 #define COMPLETE_ETH_PORT_MAP ((1 << IX_ETH_DB_NUMBER_OF_PORTS) - 1)
00123 
00128 #define IX_ETH_DB_CHECK_PORT(portID) \
00129 { \
00130     if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
00131     { \
00132         return IX_ETH_DB_INVALID_PORT; \
00133     } \
00134     \
00135     if (!ixEthDBPortInfo[(portID)].enabled) \
00136     { \
00137         return IX_ETH_DB_PORT_UNINITIALIZED; \
00138     } \
00139 }
00140 
00141 #endif /* IxEthDBPortDefs_H */
00142 
Automatically generated from sources. © Intel Corp. 2003