00001
00052
00053
00054
00055
00067 #define IX_ETHNPE_X2P_NPE_HALT 0x00
00068
00080 #define IX_ETHNPE_X2P_NPE_PORT_DISABLE 0x40
00081
00089 #define IX_ETHNPE_X2P_ELT_SETPORTADDRESS 0x10
00090
00097 #define IX_ETHNPE_X2P_NPE_SETMAXSIZEFILTERING1 0x80
00098
00105 #define IX_ETHNPE_X2P_NPE_SETMAXSIZEFILTERING2 0x81
00106
00114 #define IX_ETHNPE_X2P_ELT_ACCESSREQUEST 0x11
00115
00127 #define IX_ETHNPE_X2P_ELT_ACCESSRELEASE 0x12
00128
00135 #define IX_ETHNPE_X2P_ELT_INSERTADDRESS 0x13
00136
00144 #define IX_ETHNPE_X2P_STATS_SHOW 0x30
00145
00156 #define IX_ETHNPE_X2P_STATS_RESET 0x31
00157
00158
00159
00160
00161
00167 #define IX_ETHNPE_P2X_NPE_STATUS 0x00
00168
00175 #define IX_ETHNPE_P2X_ELT_ACKPORTADDRESS 0x10
00176
00183 #define IX_ETHNPE_P2X_NPE_ACKMAXSIZEFILTERING1 0x80
00184
00191 #define IX_ETHNPE_P2X_NPE_ACKMAXSIZEFILTERING2 0x81
00192
00200 #define IX_ETHNPE_P2X_ELT_ACCESSGRANT 0x11
00201
00213 #define IX_ETHNPE_P2X_ELT_BALANCEREQUEST 0x12
00214
00221 #define IX_ETHNPE_P2X_ELT_NEWADDRESS 0x13
00222
00229 #define IX_ETHNPE_P2X_ELT_INSERTADDRESSACK 0x14
00230
00237 #define IX_ETHNPE_P2X_ELT_INSERTADDRESSNACK 0x15
00238
00245 #define IX_ETHNPE_P2X_STATS_REPORT 0x30
00246
00252 #define IX_ETHNPE_P2X_STATS_CLEAR_REPORT 0x31
00253
00254
00265 #define IX_ETHNPE_P2X_NPE_PORT_DISABLE 0x40
00266
00267
00268
00269
00270
00276 #define MASK(hi,lo) ((1 << ((hi) + 1)) - (1 << (lo)))
00277
00283 #define BITS(x,hi,lo) (((x) & MASK(hi,lo)) >> (lo))
00284
00290 #define IX_ETHNPE_QM_Q_RXENET_LENGTH_MASK 0x3fff
00291
00297 #define IX_ETHNPE_QM_Q_FIELD_FLAG_R 20
00298
00309 #ifdef __vxworks
00310 #define IX_ETHNPE_QM_Q_FIELD_FLAG_MASK 0x30
00311 #else
00312 #define IX_ETHNPE_QM_Q_FIELD_FLAG_MASK 0x70
00313 #endif
00314
00315
00321 #define IX_ETHNPE_QM_Q_FIELD_NPEID_L 31
00322
00328 #define IX_ETHNPE_QM_Q_FIELD_NPEID_R 31
00329
00335 #define IX_ETHNPE_QM_Q_FIELD_PORTID_L 30
00336
00342 #define IX_ETHNPE_QM_Q_FIELD_PORTID_R 28
00343
00349 #define IX_ETHNPE_QM_Q_FIELD_PRIOR_L 30
00350
00356 #define IX_ETHNPE_QM_Q_FIELD_PRIOR_R 28
00357
00363 #define IX_ETHNPE_QM_Q_FIELD_ADDR_L 27
00364
00370 #define IX_ETHNPE_QM_Q_FIELD_ADDR_R 2
00371
00372
00373
00374
00375
00381 #define IX_ETHNPE_QM_Q_FREEENET_ADDR_MASK \
00382 MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
00383 IX_ETHNPE_QM_Q_FIELD_ADDR_R)
00384
00390
00391
00392
00393
00394
00395 #define IX_ETHNPE_QM_Q_RXENET_NPEID_MASK 0x80000000
00396
00402
00403
00404
00405
00406
00407 #define IX_ETHNPE_QM_Q_RXENET_PORTID_MASK 0x70000000
00408
00414 #define IX_ETHNPE_QM_Q_RXENET_ADDR_MASK \
00415 MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
00416 IX_ETHNPE_QM_Q_FIELD_ADDR_R)
00417
00423 #define IX_ETHNPE_QM_Q_TXENET_PRIOR_MASK \
00424 MASK (IX_ETHNPE_QM_Q_FIELD_PRIOR_L, \
00425 IX_ETHNPE_QM_Q_FIELD_PRIOR_R)
00426
00432 #define IX_ETHNPE_QM_Q_TXENET_ADDR_MASK \
00433 MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
00434 IX_ETHNPE_QM_Q_FIELD_ADDR_R)
00435
00441
00442
00443
00444
00445
00446 #define IX_ETHNPE_QM_Q_TXENETDONE_NPEID_MASK 0x80000000
00447
00454 #define IX_ETHNPE_QM_Q_TXENETDONE_ADDR_MASK \
00455 MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
00456 IX_ETHNPE_QM_Q_FIELD_ADDR_R)
00457
00458
00459
00460
00461
00469 #define IX_ETHNPE_QM_Q_FREEENET_ADDR_VAL(x) \
00470 ((x) & IX_ETHNPE_QM_Q_FREEENET_ADDR_MASK)
00471
00480 #define IX_ETHNPE_QM_Q_RXENET_NPEID_VAL(x) \
00481 BITS (x, IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
00482 IX_ETHNPE_QM_Q_FIELD_NPEID_R)
00483
00494 #define IX_ETHNPE_QM_Q_RXENET_PORTID_VAL(x) \
00495 BITS (x, IX_ETHNPE_QM_Q_FIELD_PORTID_L, \
00496 IX_ETHNPE_QM_Q_Field_PortID_R)
00497
00505 #define IX_ETHNPE_QM_Q_RXENET_ADDR_VAL(x) \
00506 ((x) & IX_ETHNPE_QM_Q_RXENET_ADDR_MASK)
00507
00516 #define IX_ETHNPE_QM_Q_TXENET_PRIOR_VAL(x) \
00517 BITS (x, IX_ETHNPE_QM_Q_FIELD_PRIOR_L, \
00518 IX_ETHNPE_QM_Q_FIELD_PRIOR_R)
00519
00528 #define IX_ETHNPE_QM_Q_TXENET_ADDR_VAL(x) \
00529 ((x) & IX_ETHNPE_QM_Q_TXENET_ADDR_MASK)
00530
00539 #define IX_ETHNPE_QM_Q_TXENETDONE_NPEID_VAL(x) \
00540 BITS (x, IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
00541 IX_ETHNPE_QM_Q_FIELD_NPEID_R)
00542
00550 #define IX_ETHNPE_QM_Q_TXENETDONE_ADDR_VAL(x) \
00551 ((x) & IX_ETHNPE_QM_Q_TXENETDONE_ADDR_MASK)
00552
00553
00554
00555
00556
00557
00558
00559
00560
00566 #define IX_ETHNPE_QM_Q_FREEENET_ENTRY(addr) (addr)
00567
00573 #define IX_ETHNPE_QM_Q_RXENET_ENTRY(addr,id,prt) ((id) << 30 | \
00574 (prt) << 28 | (addr))
00575
00581 #define IX_ETHNPE_QM_Q_TXENET_ENTRY(addr,pri) ((pri) << 28 | (addr))
00582
00588 #define IX_ETHNPE_QM_Q_TXENETDONE_ENTRY(addr,id) ((id) << 30 | (addr))
00589
00590
00591
00592
00593
00594
00600 #define IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN (64)
00601
00610 #define IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MASK (~63)
00611
00619 #define IX_ETHNPE_ACC_RXFREE_BUFFER_ROUND_UP(size) (((size) + 63) & ~63)
00620
00628 #define IX_ETHNPE_ACC_FRAME_LENGTH_MAX (16320)
00629
00637 #define IX_ETHNPE_ACC_FRAME_LENGTH_DEFAULT (1522)
00638
00639