![]() |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
IxAtmdAccUtopiaConfig::UtTxConfig_ Struct ReferenceUtopia Tx Config Register.
More...
|
Data Fields | |
unsigned int | reserved_1:1 |
[31] These bits are always 0. | |
unsigned int | txInterface:1 |
[30] Utopia Transmit Interface | |
unsigned int | txMode:1 |
[29] Utopia Transmit Mode | |
unsigned int | txOctet:1 |
[28] Utopia Transmit cell transfer protocol | |
unsigned int | txParity:1 |
[27] Utopia Transmit parity enabled when set | |
unsigned int | txEvenParity:1 |
[26] Utopia Transmit Parity Mode
| |
unsigned int | txHEC:1 |
[25] Header Error Check Insertion Mode | |
unsigned int | txCOSET:1 |
[24] If enabled the HEC is Exclusive-ORĈed with the value 0x55 before being presented on the Utopia bus | |
unsigned int | reserved_2:1 |
[23] These bits are always 0 | |
unsigned int | txCellSize:7 |
[22:16] Transmit expected cell size | |
unsigned int | reserved_3:3 |
[15:13] These bits are always 0 | |
unsigned int | txAddrRange:5 |
[12:8] When configured as an ATM master in MPHY mode this register specifies the upper limit of the PHY polling logical range | |
unsigned int | reserved_4:3 |
[7:5] These bits are always 0 | |
unsigned int | txPHYAddr:5 |
[4:0] When configured as a slave in an MPHY system this register specifies the physical address of the PHY |
Definition at line 944 of file IxAtmdAccCtrl.h.
|
[31] These bits are always 0.
Definition at line 947 of file IxAtmdAccCtrl.h. |
|
[23] These bits are always 0
Definition at line 985 of file IxAtmdAccCtrl.h. |
|
[15:13] These bits are always 0
Definition at line 990 of file IxAtmdAccCtrl.h. |
|
[7:5] These bits are always 0
Definition at line 995 of file IxAtmdAccCtrl.h. |
|
[12:8] When configured as an ATM master in MPHY mode this register specifies the upper limit of the PHY polling logical range The number of active PHYs are TxAddrRange + 1. Definition at line 991 of file IxAtmdAccCtrl.h. |
|
[22:16] Transmit expected cell size Configures the cell size for the transmit module: Values between 52-64 are valid. Definition at line 987 of file IxAtmdAccCtrl.h. |
|
[24] If enabled the HEC is Exclusive-ORĈed with the value 0x55 before being presented on the Utopia bus
Definition at line 979 of file IxAtmdAccCtrl.h. |
|
[26] Utopia Transmit Parity Mode
Definition at line 970 of file IxAtmdAccCtrl.h. |
|
[25] Header Error Check Insertion Mode Specifies if the transmit cell header check byte is calculated and inserted when set.
Definition at line 974 of file IxAtmdAccCtrl.h. |
|
[30] Utopia Transmit Interface The following encoding is used to set the Utopia Transmit interface as ATM master or PHY slave:
Definition at line 948 of file IxAtmdAccCtrl.h. |
|
[29] Utopia Transmit Mode The following encoding is used to set the Utopia Transmit mode to SPHY or MPHY:
Definition at line 954 of file IxAtmdAccCtrl.h. |
|
[28] Utopia Transmit cell transfer protocol Used to set the Utopia cell transfer protocol to Octet-level handshaking. Note this is only applicable in SPHY mode.
Definition at line 959 of file IxAtmdAccCtrl.h. |
|
[27] Utopia Transmit parity enabled when set TxEvenParity defines the parity format odd/even.
Definition at line 965 of file IxAtmdAccCtrl.h. |
|
[4:0] When configured as a slave in an MPHY system this register specifies the physical address of the PHY
Definition at line 996 of file IxAtmdAccCtrl.h. |